The present invention relates to a driving circuit for active-matrix type liquid crystal displays (hereinafter referred to as AM-LCDs), and more specifically, to a driving circuit for an AM-LCD using Thin-film Field effect Transistors (hereinafter referred to as TFTs).
AM-LCDs have been attracting attention in recent years as thin-film, light-weight, space-saving displays having high quality picture comparable with that of CRTs. The equivalent circuit of a part of the display unit of the conventional AM-LCD is shown in FIG. 6. As seen in FIG. 6, this equivalent circuit comprises parallel gate bus lines 38-40 and parallel drain bus lines 41-43, intersecting at right angles each other. Near the intersections between the gate bus lines 38-40 and the drain bus lines 41-43 are formed TFTs 26 and 27 whose gates are connected with gate bus line 38 and whose drains are connected with drain bus lines 41 and 42, and TFTs 28 and 29 whose gates are connected with gate bus line 39 and whose drains are connected with drain bus lines 41 and 42. These TFTs 26, 27, 28 and 29 are connected with pixel capacitances 34, 35, 36 and 37 whose pairs of electrodes are filled with a liquid crystal. The electrodes of the pixel capacitances 34, 35, 36 and 37, on the counter side to the electrodes connected with the source of the TFTs, are connected with the counter electrode power source 44. As shown in FIG. 6, capacitance components 30, 31, 32 and 33 between the gates and the sources are interposed between the TFTs 26, 27, 28 and 29 and the corresponding gate bus lines 38 and 39.
FIG. 7 shows waveforms of voltages applied to terminals of the AM-LCD having a circuit construction as shown in FIG. 6. In FIG. 7, as the gate electrode voltage 201 rises up V.sub.G2 from V.sub.G1 in the state "off" of the gate through the gate bus line, a drain signal is written in the pixel electrodes connected with the TFTs that are "on" now, the drain electrode voltage 202 rises up, and the pixel electrode voltage 203 also rises up in accordance with a predetermined time constant.
When the gate electrode voltage falls down to V.sub.G1, the drain electrode voltage 202 comes down, and the TFTs are turned off, then a voltage shift occurs in the pixel electrode voltage 203 by an amount .DELTA.V defined by the following equation(1), and the electrode potential is maintained as it is. EQU .DELTA.V=C.sub.GS (V.sub.G2 -V.sub.G1)/(C.sub.LC +C.sub.GS)(1)
where, C.sub.GS is a capacity value of the respective capacitance components 30-33 between the gate and the source of TFTs 26-29, and C.sub.LC is a capacity value of the pixel capacitances 34-37. As obvious from the above equation(1), a voltage difference V.sub.LC between the pixel electrode voltage 203 and the counter electrode voltage 204 is retained, for example, in the pixel capacitance 34 as shown in FIG. 7.
In recent years, the size of these direct-view AM-LCDs of a conventional type employing the above driving circuit have been enlarged, for instance, the size larger than 10 inches is required for personal computers, and the size larger than 20 inches is required for work stations and high-quality TVs such as EDTV and HDTV.
Generally, for the production of the display units of such AM-LCDs, a pattern is formed by using a photolithographic method or the like. For large displays as mentioned above, the area of a display unit is too large to permit the entire pattern to be exposed to light at a time. The display area is therefore divided into a plurality of pattern sections for the exposure to light. According to this divisional exposure, a misalignment of the overlapped pattern sections between adjacent pattern sections causes a capacity difference between the gate and source of TFTs for the respective sections. Since the voltage shift .DELTA.V depends on the capacity between the gate and the source, as understandable from Eq.(1), the voltage values of .DELTA.V vary from section to section due to the above misalignment of overlapped pattern sections. For example, under the condition where the display area is divided into two sections of Section A on the left-hand side and Section B on the right-hand side, the two sections are exposed to light, .DELTA.V.sub.1 represents the voltage shift in Section A while .DELTA.V.sub.2 represents the voltage shift in Section B, and the amount of the overlap between the gate and the source of TFTs in Section B is larger than that in Section A, the voltage shift .DELTA.V is smaller than .DELTA.V.sub.2.
A delay is caused in the signal passed through the gate bus line due to the resistance and capacitance components contained in the lines. For this reason, as shown in FIG. 8, the gate of the TFT is turned off as soon as the input side gate voltage 301 at the input portion of the gate bus line drops, while the terminated side gate voltage 302 at the terminated portion is not turned off immediately due to the signal delay, permitting the writing operation for a while. As a result, the voltage shift of the applied liquid crystal voltage when the gate voltage is turned off shows a different value between the voltage shift .DELTA.V.sub.3 corresponding to the input side pixel voltage 303 at the input portion and the voltage shift .DELTA.V.sub.4 corresponding to the terminated side pixel voltage 304 at the terminated portion, as shown in FIG. 8.
For the reasons described above, the voltage shift value for the display area, .DELTA.V, varies depending on the exposed sections and the direction along the gate bus lines. Even if the voltage of the counter electrode voltage source 44 is shifted by an amount equal to the voltage shift at the corresponding position to include no DC component in the liquid crystal driving voltage in a certain section of the display area, the DC component will still remain in the driving voltage in a different section due to the difference in voltage shift, resulting in the defects of image quality deteriorations such as uneven brightness, flicker and image sticking, and shortening the life of the liquid crystal.